1. Technical Field
This disclosure generally relates to testing direct memory address translation, and more specifically relates to efficient testing of direct memory access translation in an integrated circuit such as in a high speed communication link between one or more processors and graphics processing units.
2. Background Art
Integrated circuit testing tools attempt to generate the most thorough and stressful test case for an integrated circuit. In theory, the generated test cases should provide maximum test coverage and should be able to stress various timing scenarios and operations on the integrated circuit. Testing may be performed during development and production. Building test cases to thoroughly test a complicated integrated circuit can be extremely costly in time and resources. Building efficient test code is an important goal of integrated circuit testing.
Direct memory access (DMA) is a feature of computer systems that allows hardware subsystems to access main system memory independent of the central processing unit (CPU). In some high speed systems, a link processing unit is used to interconnect between chips or portions of a chip to provide DMA between the chips while insuring memory coherency. An example use of this link processing unit would be to connect a CPU chip to a cluster of graphics processing unit (GPU) chips. The CPU and GPU cluster have the ability to coherently read and write each other's memory. The GPU can use non-caching (DMA) reads and writes for high bandwidth data moves between GPU memory and CPU memory.